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반도체 미세 패턴 식각을 위한 EPD 시스템 개발 및 연구 The Develop and Research of EPD system for the semiconductor fine pattern etching

김재필, 황우진, 신유식, 남진택, 김홍민, 김창은
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  • URLhttp://db.koreascholar.com/Article/Detail/307776
대한안전경영과학회지
제17권 제3호 (2015.09)
pp.355-362
대한안전경영과학회 (Korea Safety Management & Science)
초록

There has been an increase of using Bosch Process to fabricate MEMS Device, TSV, Power chip for straight etching profile. Essentially, the interest of TSV technology is rapidly floated, accordingly the demand of Bosch Process is able to hold the prominent position for straight etching of Si or another wafers. Recently, the process to prevent under etching or over etching using EPD equipment is widely used for improvement of mechanical, electrical properties of devices. As an EPD device, the OES is widely used to find accurate end point of etching. However, it is difficult to maintain the light source from view port of chamber because of contamination caused by ion conflict and byproducts in the chamber. In this study, we adapted the SPOES to avoid lose of signal and detect less open ratio under 1 %. We use 12inch Si wafer and execute the through etching 500um of thickness. Furthermore, to get the clear EPD data, we developed an algorithm to only receive the etching part without deposition part. The results showed possible to find End Point of under 1 % of open ratio etching process.

목차
1. 서 론
 2. 실험 준비
  2.1. 식각 장치 및 EPD 장치
  2.2. 시료 준비 및 식각 조건
  2.3. EPD 알고리즘
 3. 결과 및 고찰
 4. 결론
 5. References
저자
  • 김재필(기가레인) | Kim Jae Pil Corresponding Author
  • 황우진(기가레인) | WooJin Hwang
  • 신유식(기가레인) | Youshik Shin
  • 남진택(기가레인) | JinTaek Nam
  • 김홍민(명지대학교) | Kim hong Min
  • 김창은(명지대학교) | Kim chang Eun