Composition element of power-up reset circuit is consisted with many PMOS and by capacitors, reduce number of used element to improve power-up reset circuit to secure stable early action of memory chip, and size of element decreases and consumption area of circuit itself could reduce about 10%.
In this paper, when rise slowly existing circuit and circuit that improve by comparison simulation result and power rise time 200㎳ to confirm stability of circuit action, output voltage waveform peak of improved power-up reset circuit secures more than 2Vt, and displayed stabler circuit action than change width few existing circuit by temperature.

Abstract
 1. 서 론
 2. 시스템의 이론적 고찰
 3. 기존의 회로 구성 및 동작
  3. 1 기존의 회로 구성
  3. 2 기존의 동작 회로
 4. 개선한 회로 구성 및 동작
  4. 1 개선한 회로 구성
  4. 2 개선한 동작 회로
 5. 실험 방법 및 결과
  5. 1 실험 방법
  5. 2 실험 결과
 6. 결 론
 참 고 문 헌

• 조명현(서일대학 정보기술계열) | M. H. CHO
• 이명언(서일대학 정보기술계열) | M. U. LEE