고분자 분리막의 대표적인 형태 중 하나인 평판형 분리막은 제조가 용이하여 실험실에서 분리막 소재 연구에서부 터 실제 상용 분리막 생산에 이르기까지 널리 활용되는 분리막의 형태이다. 정밀여과 및 한외여과 등에 사용되는 평판형의 다공성 고분자 분리막은 주로 상분리 공정을 통해 제조할 수 있으며, 여기에는 비용매 유도 및 증기 유도 상분리 공정이 활 용된다. 그러나 상분리 공정 특성상 주변 환경과 실험자에 따라 샘플 간 편차가 쉽게 발생하여 재현성의 확보가 어려운 점이 있다. 따라서 개발된 제조기술을 스케일업 및 재현성 확보를 위해 제어된 환경에서 연속식 대면적 제조가 가능한 롤투롤 제 조장치가 필요하며, 본 연구에서는 실험실 스케일의 제조기술을 나이프 및 슬롯다이 롤투롤 공정으로 스케일 업 했을 때 나 타나는 제조 환경 차이에 따른 분리막의 특성 변화를 비교하였다. 최종적으로 연속식 제조공정 인자에 대한 최적화를 통해 대면적 제조 시 분리막의 균일성을 확보하였다.

The electroconvection generated on the surface of an ion exchange membrane (IEM) is closely related to the electrical/ chemical characteristics or topology of the IEM. In particular, when non-conductive regions are mixed on the surface of the IEM, it can have a great influence on the transfer of ions and the formation of nonlinear electroconvective vortices, so more theoretical and experimental studies are necessary. Here, we present a novel method for creating microscale non-conductive patterns on the IEM surface by laser ablation, and successfully visualize microscale vortices on the surface modified IEM. Microscale (~300 μm) patterns were fabricated by applying UV nanosecond laser processing to the non-conductive film, and were transferred to the surface of the IEM. In addition, UV nanosecond laser process parameters were investigated for obvious micro-pattern production, and operating conditions were optimized, such as minimizing the heat-affected zone. Through this study, we found that non-conductive patterns on the IEM surface could affect the generation and growth of electroconvective vortices. The experimental results provided in our study are expected to be a good reference for research related to the surface modification of IEMs, and are expected to be helpful for new engineering applications of electroconvective vortices using a non-conductive patterned IEM.

Graphene has shown exceptional properties for high performance devices due to its high carrier mobility. Of particular interest is the potential use of graphene nanoribbons as field-effect transistors. Herein, we introduce a facile approach to the fabrication of graphene nanoribbon (GNR) arrays with ~200 nm width using nanoimprint lithography (NIL), which is a simple and robust method for patterning with high fidelity over a large area. To realize a 2D material-based device, we integrated the graphene nanoribbon arrays in field effect transistors (GNR-FETs) using conventional lithography and metallization on highly-doped Si/SiO2 substrate. Consequently, we observed an enhancement of the performance of the GNRtransistors compared to that of the micro-ribbon graphene transistors. Besides this, using a transfer printing process on a flexible polymeric substrate, we demonstrated graphene-silicon junction structures that use CVD grown graphene as flexible electrodes for Si based transistors.

본 실험에서는 다양한 PP를 이용하여 필름과 중공사의 형태로 압축과 사출을 통해서 제작되었다. 권취속도를 달리하여 중공사막을 제조하였으며, 코어로는 질소를 사용하였다. 제작된 필름과 중공사막은 만능재료시험기를 이용하여 응력과 변현율을 측정하였다. 그리고 시차주사열량계(DSC)를 이용하여 각각의 샘플의 Tm, Tc, 결정화도를 측정하였고, 냉각속도에 따른 결정화도의 거동을 조사하였다. 전계방출형주사현미경(FE-SEM)을 이용하여 단면, 표면의 모폴로지를 관찰하였다.

Disk type porous nickel membrane was fabricated by in-situ reduction/sintering process using compacted NiO/PMMA (PMMA; Polymethyl methacrylate) mixture at 800℃ in hydrogen atmosphere. The porosity (4958%) of these membrane was investigated as an amount of PMMA additive. The thermal decomposition and reduction behavior of NiO/PMMA were analyzed by TG/DTA in hydrogen atmosphere and the activation energy for the hydrogen reduction of NiO and thermal degradation of PMMA was calculated as 61.1 kJ/mol, evaluated by Kissinger method. Finally, the filtering performance and pressure drop were measured by particle counting system.