Cu2ZnSn(S,Se)4 (CZTSSe) based thin-film solar cells have attracted growing attention because of their earthabundant and non-toxic elements. However, because of their large open-circuit voltage (Voc)-deficit, CZTSSe solar cells exhibit poor device performance compared to well-established Cu(In,Ga)(S,Se)2 (CIGS) and CdTe based solar cells. One of the main causes of this large Voc-deficit is poor absorber properties for example, high band tailing properties, defects, secondary phases, carrier recombination, etc. In particular, the fabrication of absorbers using physical methods results in poor surface morphology, such as pin-holes and voids. To overcome this problem and form large and homogeneous CZTSSe grains, CZTSSe based absorber layers are prepared by a sputtering technique with different RTA conditions. The temperature is varied from 510 oC to 540 oC during the rapid thermal annealing (RTA) process. Further, CZTSSe thin films are examined with X-ray diffraction, X-ray fluorescence, Raman spectroscopy, IPCE, Energy dispersive spectroscopy and Scanning electron microscopy techniques. The present work shows that Cu-based secondary phase formation can be suppressed in the CZTSSe absorber layer at an optimum RTA condition.

Dinickel-silicide (Ni2Si)/glass was employed as a counter electrode for a dye-sensitized solar cell (DSSC) device. Ni2Si was formed by rapid thermal annealing (RTA) at 700 oC for 15 seconds of a 50 nm-Ni/50 nm-Si/glass structure. For comparison, Ni2Si on quartz was also prepared through conventional electric furnace annealing (CEA) at 800 oC for 30 minutes. XRD, XPS, and EDS line scanning of TEM were used to confirm the formation of Ni2Si. TEM and CV were employed to confirm the microstructure and catalytic activity. Photovoltaic properties were examined using a solar simulator and potentiostat. XRD, XPS, and EDS line scanning results showed that both CEA and RTA successfully led to tne formation of nano thick- Ni2Si phase. The catalytic activity of CEA-Ni2Si and RTA-Ni2Si with respect to Pt were 68 % and 56 %. Energy conversion efficiencies (ECEs) of DSSCs with CEA-Ni2Si and RTA-Ni2Si catalysts were 3.66 % and 3.16 %, respectively. Our results imply that nano-thick Ni2Si may be used to replace Pt as a reduction catalytic layer for a DSSCs. Moreover, we show that nanothick Ni2Si can be made available on a low-cost glass substrate via the RTA process.

Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide whichcan enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was thenprepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a NiCl2 environment. Afterremoving surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemicalvapor deposition at 200oC. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing(RTA) process at 730oC for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as thecrystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer wasepitaxially crystallized with the help of NiSi2 precipitates that originated from the poly-Si seed layer. The crystallinity of theSERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process.The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to 1×1018cm−3. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by theSERTA process were 85cm2/V·s and 1.23V/decade at Vds=−3V, respectively. The off current was little increased underreverse bias from 1.0×10−11 A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakagecurrent can be fabricated with more precise experiments.

Mono- and few-layer graphenes were grown on Ni thin films by rapid-thermal pulse chemical vapor deposition technique. In the growth steps, the exposure step for 60 s in H2 (a flow rate of 10 sccm (standard cubic centimeters per minute)) atmosphere after graphene growth was specially established to improve the quality of the graphenes. The graphene films grown by exposure alone without H2 showed an intensity ratio of IG/I2D = 0.47, compared with a value of 0.38 in the films grown by exposure in H2 ambient. The quality of the graphenes can be improved by exposure for 60 s in H2 ambient after the growth of the graphene films. The physical properties of the graphene films were investigated for the graphene films grown on various Ni film thicknesses and on 260-nm thick Ni films annealed at 500 and 700˚C. The graphene films grown on 260-nm thick Ni films at 900˚C showed the lowest IG/I2D ratio, resulting in the fewest layers. The graphene films grown on Ni films annealed at 700˚C for 2 h showed a decrease of the number of layers. The graphene films were dependent on the thickness and the grain size of the Ni films.

Modified thermal annealing was applied to the activation of the polycrystalline silicon films doped as p-type through implantation of B2H6. The statistical design of experiments was successfully employed to investigate the effect of rapid thermal annealing on activation of polycrystalline Si doped as p-type. In this design, the input variables are furnace temperature, power of halogen lamps, and alternating magnetic field. The degree of ion activation was evaluated as a function of processing variables, using Hall effect measurements and Raman spectroscopy. The main effects were estimated to be furnace temperature and RTA power in increasing conductivity, explained by recrystallization of doped ions and change of an amorphous Si into a crystalline Si lattice. The ion activation using rapid thermal annealing is proven to be a highly efficient process in low temperature polycrystalline Si technology.