In this study, the influence on the surface passivation properties of crystalline silicon according to silicon wafer thickness, and the correlation with a-Si:H/c-Si heterojunction solar cell performances were investigated. The wafers passivated by p(n)-doped a-Si:H layers show poor passivation properties because of the doping elements, such as boron(B) and phosphorous(P), which result in a low minority carrier lifetime (MCLT). A decrease in open circuit voltage (Voc) was observed when the wafer thickness was thinned from 170μm to 50μm. On the other hand, wafers incorporating intrinsic (i) a-Si:H as a passivation layer showed high quality passivation of a-Si:H/c-Si. The implied Voc of the ITO/p a-Si:H/i a-Si:H/n c-Si wafer/i a-Si:H/n a-Si:H/ITO stacked layers was 0.715 V for 50μm c-Si substrate, and 0.704 V for 170μm c-Si. The Voc in the heterojunction solar cells increased with decreases in the substrate thickness. The high quality passivation property on the c-Si led to an increasing of Voc in the thinner wafer. Short circuit current decreased as the substrate became thinner because of the low optical absorption for long wavelength light. In this paper, we show that high quality passivation of c-Si plays a role in heterojunction solar cells and is important in the development of thinner wafer technology.

Gate oxide의 특성은 세정공정에서 사용된 last세정용액에 큰 영향을 받는다. Standard RCA, HF-last, SCI-last, and HF-only 공정들은 gate oxidation하기 전 본 실험에서 행해진 세정공정들이다. 세정공정을 마친 Si기판들은 oxidation furnace에서 900˚C로 thermal oxidation공정을 거치게 된다. 100Å의 gate oxide를 성장시킨 후 lifetime detector, VPD, AAS, SIMS, TEM, 그리고 AFM고 같은 분석장비를 이용하여 oxide의 특성을 평가했다. HF-last와 HF-only 공정에 의해 금속 불순물들이 매우 효과적으로 제거됐음을 알 수 있었다. Oxide의 표면 및 계면 형상은AFM과 TEM 측정을 통하여 관찰하였다. 표면거칠기는 SCI 세정용액을 사용한 splits 실험에서 불균일함이 관찰되었고 HF-only세정공정을 거친 시편 및 계면이 가장 smooth했다.