As the limitations of Moore’s Law become evident, there has been growing interest in advanced packaging technologies. Among various 3D packaging techniques, Cu-SiO2 hybrid bonding has gained attention in heterogeneous devices. However, certain issues, such as its high-temperature processing conditions and copper oxidation, can affect electrical properties and mechanical reliability. Therefore, we studied depositing only a heterometal on top of the Cu in Cu-SiO2 composite substrates to prevent copper surface oxidation and to lower bonding process temperature. The heterometal needs to be deposited as an ultra-thin layer of less than 10 nm, for copper diffusion. We established the process conditions for depositing a Co film using a Co(EtCp)2 precursor and utilizing plasma-enhanced atomic layer deposition (PEALD), which allows for precise atomic level thickness control. In addition, we attempted to use a growth inhibitor by growing a self-assembled monolayer (SAM) material, octadecyltrichlorosilane (ODTS), on a SiO2 substrate to selectively suppress the growth of Co film. We compared the growth behavior of the Co film under various PEALD process conditions and examined their selectivity based on the ODTS growth time.

Nuclear power plants in Korea stores approximately 3,800 drums of paraffin solidification products. Due to the lack of homogeneity, these solidification products are not allowed to be disposed of. There is therefore a need for the separation of paraffin from the solidification products. This work developed an equipment for a selective separation of paraffin from the solidification product using the vacuum evaporation and condensational recovery method in a closed system. The equipment mainly consists of a vacuum evaporator and a condensational deposition recovery chamber. Nonisothermal vacuum TGAs, kinetic analyses and kinetic predictions were conducted to set appropriate operation conditions. Its basic operability under the established conditions was first confirmed using pure paraffin solid. Simulated paraffin solidification product fixing dried boric acid waste including nonradioactive Co and Cs were then fabricated and tested for the capability of selective separation of paraffin from the simulated waste. Paraffin was selectively separated without entertainment of Co and Cs. It was confirmed that the developed equipment could separate and recover paraffin in the form of nonradioactive waste.

The semiconductor industry faces physical limitations due to its top-down manufacturing processes. High cost of EUV equipment, time loss during tens or hundreds of photolithography steps, overlay, etch process errors, and contamination issues owing to photolithography still exist and may become more serious with the miniaturization of semiconductor devices. Therefore, a bottom-up approach is required to overcome these issues. The key technology that enables bottom-up semiconductor manufacturing is area-selective atomic layer deposition (ASALD). Here, various ASALD processes for elemental metals, such as Co, Cu, Ir, Ni, Pt, and Ru, are reviewed. Surface treatments using chemical species, such as self-assembled monolayers and small-molecule inhibitors, to control the hydrophilicity of the surface have been introduced. Finally, we discuss the future applications of metal ASALD processes.

Silicon heterojunction solar cells can achieve high conversion efficiency with a simple structure. In this study, we investigate the passivation characteristics of VOx thin films as a hole-selective contact layer using ALD (atomic layer deposition). Passivation characteristics improve with iVoc (implied open-circuit voltage) of 662 mV and minority carrier lifetime of 73.9 μs after post-deposition annealing (PDA) at 100 oC. The improved values are mainly attributed to a decrease in carbon during the VOx thin film process after PDA. However, once it is annealed at temperatures above 250 oC the properties are rapidly degraded. X-ray photoelectron spectroscopy is used to analyze the chemical states of the VOx thin film. As the annealing temperature increases, it shows more formation of SiOx at the interface increases. The ratio of V5+ to V4+, which is the oxidation states of vanadium oxide thin films, are 6:4 for both as-deposition and annealing at 100 oC, and 5:5 for annealing at 300 oC. The lower the carbon content of the ALD VOx film and the higher the V5+ ratio, the better the passivation characteristics.

Hole carrier selective MoOx film is obtained by atomic layer deposition(ALD) using molybdenum hexacarbonyl[Mo(CO)6] as precursor and ozone(O3) oxidant. The growth rate is about 0.036 nm/cycle at 200 g/Nm of ozone concentration and the thickness of interfacial oxide is about 2 nm. The measured band gap and work function of the MoOx film grown by ALD are 3.25 eV and 8 eV, respectively. X-ray photoelectron spectroscopy(XPS) result shows that the Mo6+ state is dominant in the MoOx thin film. In the case of ALD-MoOx grown on Si wafer, the ozone concentration does not affect the passivation performance in the as-deposited state. But, the implied open-circuit voltage increases from 576 oC to 620 oC at 250 g/Nm after post-deposition annealing at 350 oC in a forming gas ambient. Instead of using a p-type amorphous silicon layer, high work function MoOx films as hole selective contact are applied for heterojunction silicon solar cells and the best efficiency yet recorded (21 %) is obtained.

Graphene could be damaged and contain impurities on its surface while several fabrications such as deposition, etching, and patterning because one needs photoresist masking operation to divide the section for deposition or not. In this paper, we investigated the effectiveness of selective atomic layer deposition for clean graphene surface. Atomic layer deposition (ALD) has strong point at very uniform conformity of 1 rms roughness. In this process, H2O is generally used by one of precursors. This H2O precursor make deposition of ALD on hydrophilic surface not hydrophobic. Therefore, we used this property at graphene which has hydrophobic surface. And then, we analyzed selective deposition of ALD on graphene which are grown on Cu foil and transferred by wet process not cleaved from HOPG.

SiH4환원에 의한 선택성 CVD-W 공정에서 증착시간과 증착압력에 따른 W막 특성의 변화를 조사하였다. 300˚C, 100mtorr이하에서 W막이 Si기판 전면에 증착되는 데에 약 30초의 시간이 걸렸고, 증착시간에 따라 막 두께는 초기에는 직선적으로, 나중에는 포물선적으로 증가하였으며, 면저항은 초기에는 급히, 나중에는 서서히 감소하는 경향을 나타내었다. 50-300mtorr의 압력범위에서 압력의 증가에 따라 결정립도(grain size)는 별로 변하지 않았으나 결정립계(grain boundary)의 윤곽이 불확실해지는 경향을 나타내었다. 또한 이 압력범위에서는 α-W만 나타날 뿐 β-W의존재는 발견되지 않았다. 증차압력의 증가에 따라 W막의 증착속도가 증가하고, 비저항도 증가하는 경향을 보였다. AES 분석결과에 의하면, 증착압력온 Si/W의 조성비나 W/Si계면에서의 실리사이드화에는 큰 영향을 미치지 않는 것으로 나타났다.