In this paper, we present a CMOS voltage regulator for application in electric device. This works shows that unlike the traditional voltage converter, this regulator can achieve high efficiency with a good step-down voltage ratio. The circuits which are implemented in this paper is simulated with LT SPICE tool of computer.

The paper describes variable circuits technique the enable of differential circuit of charge pump. It is able to pump an input voltage of 2V to measure several output voltage through several clock signal with each pumping capacitor of 1 pF and smoothing capacitor of 1 pF at the output. From the simulation result, it is evident that charge pump circuits offer verity high voltage pumping gain. The circuits which are implemented in this paper is simulated with LT SPICE tool of computer.

The paper describes variable circuits technique the enable of differential circuit of charge pump. It is able to pump an input voltage of 2V to measure several output voltage through several clock signal with each pumping capacitor of 1 pF and smoothing capacitor of 1 pF at the output. From the simulation result, it is evident that charge pump circuits offer verity high voltage pumping gain. The circuits which are implemented in this paper is simulated with LT SPICE tool of computer.

2충의 BPSG를 사용하는 서브마이크론 CMOS DRAM에 있어 전기적 특성에 관한 BPSG flow온도의 영향을 비교하였다. BPSG flow온도를 850˚C/850˚C, 850˚C/900˚C, 900˚C/900˚C의 3가지 다른 조합을 적용하여 문턱전압, 파괴전압, Isolation전압과 더불어 면저항과 접촉 저항을 조사하였다. 900˚C/900˚C flow의 경우 NMOS에서 문턱전압은 0.8μm 미만의 채널길이에서 급격히 감소하나 PMOS 경우는 차이가 없었다. NMOS와 PMOS의 파괴전압은 각각 0.7μm와 0.8μm 이하에서 급격히 감소하였다. 그러나 850˚C/850˚C flow의 경우에는 NMOS와 PMOS모두 문턱전압과 파괴전압은 채널길이 0.7μm까지 감소하지 않았다. Isolation전압은 BPSG flow온도 감소에 따라 증가하였다. 면저항과 접촉 저항은 BPSG flow온도가 900˚C에서 850˚C로 감소됨에 따라 급격히 증가되었다. 이와 같은 결과는 열처리 온도에 따라 dopant의 확산과 활성화에 관련 있는 것으로 생각된다. 접촉 저항 증가에 대한 개선 방법에 대하여 고찰하였다.

A miniaturized CMOS bandpass filter for a single RF transceiver system is presented, using diagonally end-shorted coupled lines and lumped capacitors. In contrast to conventional miniaturized coupled line filters, it is proven that the effective permittivity variation of the coupled transmission line has no effect on shifting the center frequency when the bandpass filter is highly miniaturized. A bandpass filter at a center frequency of 2 GHz was fabricated by 0.18μm CMOS technology. The insertion loss with the die area of 1500μm×1000μm is -5.14 dB. Simulated results are well agreed with the easurements. It also verify the center frequency stability in the compact size bandpass filter.

본 연구는 고해상도 디지털 X선 영상 검출기 적용을 위해 미세 Gd2O2S:Tb 형광체 분말을 저온 액상법을 이용하여 합성하였다. 제조된 형광체 분말을 이용하여 입자침전법을 이용하여 형광체 필름을 제작하여 발광특성을 조사하였다. 측정결과, Tb 첨가농도에 따른 상대적인 발광량 측정결과 5 wt%의 첨가농도에서 가장 높은 발광효율을 보였으며, 첨 가농도가 증가할수록 소광현상에 의한 발광강도가 급격히 감소하는 경향을 보였다. 또한 270 ㎛ 두께의 Gd2O2S:Tb에 서 2945 pC/cm2/mR의 발광 강도를 가졌으며, 발광 강도가 거의 포화되는 것을 관찰할 수 있었다. 끝으로 제조된 형광 체의 영상획득 성능을 평가하기 위해 상용화된 CMOS 센서를 이용하여 X선 영상을 획득하여 MTF, NPS를 측정하여 DQE 평가를 수행하였다. 측정결과, DQE(0)의 값은 37%로 다소 낮은 값을 보였다. 향후 필름 제조 공정상의 문제점 을 해결한다면, DQE를 개선할 수 있을 것으며, 고해상도 의료 방사선 영상 시스템 적용에 유용하게 적용 가능할 것으 로 판단된다.

In this letter, the effect of quality factor on center frequency deviation in miniaturized coupled line bandpass filter (BPF) with diagonally end-shorted at their opposite sides and lumped capacitors is theoretically analyzed. The miniaturized BPF of a two-stage structure with two types of quality factors in standard CMOS process was designed and manufactured at 5.5 GHz. The die area of BPF was 1.44×0.41 mm2. The measured center frequency of BPF with a quality factor of 4.9 was deviated from 5.5 GHz to 4.7 GHz. The one with 14.8 was shifted to 5GHz. The theoretical and measured results validate that quality factor influences the center frequency shift of BPF.

A novel miniaturized CMOS C-Band bandpass filter based on diagonally end-shorted coupled lines and interdigital capacitors is proposed. The utilized coupled lines structure reduced the configuration in size, as small as a few degrees. Moreover, the characteristic of interdigital capacitor, relatively high Q and good capacitance tolerance, accounts for the satisfied performance of this new filter. A two-stage bandpass filter was designed and fabricated with chip surface area only 1.02×1.4 mm2.