As an alternative to the W plug used in MOSFETs, a Cu plug with a NiSi contact using Ta / TaN as a diffusion barrier is currently being considered. Conventionally, Ni was first deposited and then NiSi was formed, followed by the barrier and Cu deposition. In this study, Ti was employed as a barrier material and simultaneous formation of the NiSi contact and Cu plug / Ti barrier was attempted. Cu(100 nm) / Ti / Ni(20 nm) with varying Ti thicknesses were deposited on a Si substrate and annealed at 4000˚C for 30 min. For comparison, Cu/Ti/NiSi thin films were also formed by the conventional method. Optical Microscopy (OM), Scanning Probe Microscopy (SPM), X-Ray Diffractometry (XRD), and Auger Electron Microscopy (AES) analysis were performed to characterize the inter-diffusion properties. For a Ti interlayer thicker than 50 nm, the NiSi formation was incomplete, although Cu diffusion was inhibited by the Ti barrier. For a Ti thickness of 20 nm and less, an almost stoichiometric NiSi contact along with the Cu plug and Ti barrier layers was formed. The results were comparable to that formed by the conventional method and showed that this alternative process has potential as a formation process for the Cu plug/Ti barrier/NiSi contact system.

Tetragonal-Ni1-xPdxSi/Si (001) structure was studied by using density functional theory (DFT). An epitaxial interface between 2×2×4 (001) tetragonal-NiSi supercell and 1×1×2 (001) Si supercell was first constructed by adjusting the lattice parameters of B2-NiSi structure to match those of the Si structure. We chose Ni atoms as a terminating layer of the B2-NiSi; the equilibrium gap between the tetragonal-NiSi and Si was calculated to be 1.1 Å. The Ni atoms in the structure moved away from the original positions along the z-direction in a systematic way during the energy minimization. Two different Ni sites were identified at the interface and the bulk, respectively. The two Ni sites at the interface have 6 and 7 coordination numbers. The Ni sites with coordination number 6 at the interface were located farther away from the interface, and were more favorable for Pd substitution.

Thermally evaporated 10 nm-Ni/1 nm-Au/(30 nm-poly)Si structures were fabricated in order to investigate the thermal stability of Au-inserted nickel silicide. The silicide samples underwent rapid thermal annealing at 300~1100˚C for 40 seconds. The sheet resistance was measured using a four-point probe. A scanning electron microscope and a transmission electron microscope were used to determine the cross-sectional structure and surface image. High-resolution X-ray diffraction and a scanning probe microscope were employed for the phase and surface roughness. According to sheet resistance and XRD analyses, nickel silicide with Au had no effect on widening the NiSi stabilization temperature region. Au-inserted nickel silicide on a single crystal silicon substrate showed nano-dots due to the preferred growth and a self-arranged agglomerate nano phase due to agglomeration. It was possible to tune the characteristic size of the agglomerate phase with silicidation temperatures. The nano-thick Au-insertion was shown to lead to self-arranged microstructures of nickel silicide.

실리사이드반웅을 이용하여 니켈모노실리사이드의 양측계면에 단결정실리콘을 적층시켜 전도성이 우수하며 식각특성이 달라 MEMS용 기판으로 채용이 가능한 SOS (Silicon-on-Silicide) 기판을 제작하였다. 실리콘 기판 전면에 Ni를 열증착법으로 1000Å두께로 성막하고, 실리콘 기판 경면과 맞블여 후 300~900˚C온도범위에서 15시간동안 실리사이드 처리하여 니켈모노실리사이드가 접합매체로 되는 기판쌍들을 완성하였다. 완성된 기판쌍들은 IR (infrared) 카메라를 이용하여 비파괴적으로 접합상태를 확인하고. 주사전자현미경 (scaning electron microscope)과 투과전자현미경 (tranmission electron microscope)을 이용하여 수직단면 미세구조를 확인하였다. Ni 실리사이드의 상변화가 일어나는 온도를 제외하고는 Si NiSi ∥Si 기판쌍은 기판전면에 52%이상 완전접합이 진행되었음을 확인하였고 생성 실리사이드의 두께에 따라 나타나는 명암부에 비추어 기판쌍 중앙부에 두꺼운 니켈노실리아드가 형성되었다고 판단되었다. 완성된 Si NiSi ∥ Si 기판쌍을 SBM 수직단면에 의괘 확인한 결과 접합이 완성된 기판중심부의 접합계면은 1000Å 두께의 NiSi가 균일하게 형성되었으며 배율 30,000배의 해상도에서 계면간 분리부분없이 완전한 접합이 진행되었음을 확인하였다. 반면 기판쌍 에지 (edge)부분에는 실리사이드가 헝성되지 않은 비접합상태가 발견되었다. 수직단면루과전자현미경 결과물에 근거하여 접합된 중심부에서는 피접합되는 실리콘의 경면과 니켈이 성막된 실리콘 경면 상부계면에 10-20Å의 비정질막이 발견되었으며, 산화막으로 추정되는 이 막이 접합률을 현저히 저하시키는 것을 확인하였다. 접합이 진행되지 않은 에지부는 이러한 산화막이 열처리 진행중 급격히 성장하여 피접합 실리콘층의 분리가 발생하였다. 따라서 Si NiSi ∥Si 기판쌍의 접합률을 향상시키기 위해서는 피접합 실리콘 계면과 Ni 상부층간의 비정질부를 적극적으로 제거하여야 함을 알 수 있었다.