This study is aimed at preparing and evaluating the plasma resistance of YAS (Y2O3-Al2O3-SiO2) coating layer with crystalline YAG phase contents. For this purpose, YAS frits with controlled phase contents are prepared and melt-coated on sintered Al2O3 ceramics. Then, the results of phase analysis of crystalline YAS coating layer are compared to that of YAS frits, and discussed with regard to the plasma resistance of the YAS coating layer. The phase contents of the YAS frit change in a manner different from that of the prepared YAS coating layer, presumably owing to the composition change of YAS frit during the melt-coating process. The plasma resistance of the YAS coating layer is shown to increase with the YAG phase contents in the coating layer. Comparing the weight loss of YAS coating layer with those of commercial Y2O3, Al2O3, and quartz ceramics, the plasma resistance of the prepared YAS coating layer is 8 times higher than that of quartz and 3 times higher than that of Al2O3; this layer shows 70 % of the resistance of Y2O3.

(PDDA/SiO2) thin films that consisted of positively charged poly (diallyldimethylammonium chloride) (PDDA) and negatively charged SiO2 nanoparticles were fabricated on a glass substrate by an applying voltage layer-by-layer (LBL) self-assembly method. In this study, the microstructure and optical properties of the (PDDA/SiO2) thin films coated on glass substrate were measured as a function of the applied voltage on the Pt electrodes. When 1.0 V was applied to a Pt electrode in a PDDA and SiO2 solution, the thickness of the (PDDA/SiO2)10 thin film increased from 79 nm to 166 nm. The surface roughness also increased from 15.21 nm to 33.25 nm because the adsorption volume of the oppositely charged PDDA and SiO2 solution increased. Especially, when the voltage was applied to the Pt electrode in the SiO2 solution, the thickness increase of the (PDDA/SiO2) thin film was larger than that obtained when using the PDDA solution. The refractive index of the fabricated (PDDA/SiO2) thin film was ca. n = 1.31~1.32. The transmittance of the glass substrate coated by (PDDA/SiO2)6 thin film with a thickness of 106 nm increased from ca. 91.37 to 95.74% in the visible range.

The Charge Trap Flash (CTF) memory device is a replacement candidate for the NAND Flash device. In this study,Pt/Al2O3/La2O3/SiO2/Si multilayer structures with lanthanum oxide charge trap layers were fabricated for nonvolatile memorydevice applications. Aluminum oxide films were used as blocking oxides for low power consumption in program/erase operationsand reduced charge transports through blocking oxide layers. The thicknesses of SiO2 were from 30Å to 50Å. From the C-Vmeasurement, the largest memory window of 1.3V was obtained in the 40Å tunnel oxide specimen, and the 50Å tunnel oxidespecimen showed the smallest memory window. In the cycling test for reliability, the 30Å tunnel oxide sample showed an abruptmemory window reduction due to a high electric field of 9~10MV/cm through the tunnel oxide while the other samples showedless than a 10% loss of memory window for 104cycles of program/erase operation. The I-V measurement data of the capacitorstructures indicated leakage current values in the order of 10-4A/cm2 at 1V. These values are small enough to be used in non-volatile memory devices, and the sample with tunnel oxide formed at 850oC showed superior memory characteristics comparedto the sample with 750oC tunnel oxide due to higher concentration of trap sites at the interface region originating from the roughinterface.

Multi-walled carbon nanotubes (MWNTs) were synthesized on different substrates (bare Si and SiO2/Si substrate) to investigate dye-sensitized solar cell (DSSC) applications as counter electrode materials. The synthesis of MWNTs samples used identical conditions of a Fe catalyst created by thermal chemical vapor deposition at 900˚C. It was found that the diameter of the MWNTs on the Si substrate sample is approximately 5~10nm larger than that of a SiO2/Si substrate sample. Moreover, MWNTs on a Si substrate sample were well-crystallized in terms of their Raman spectrum. In addition, the MWNTs on Si substrate sample show an enhanced redox reaction, as observed through a smaller interface resistance and faster reaction rates in the EIS spectrum. The results show that DSSCs with a MWNT counter electrode on a bare Si substrate sample demonstrate energy conversion efficiency in excess of 1.4 %.

Silicon dioxide as gate dielectrics was grown at 400˚C on a polycrystalline Si substrate by inductively coupled plasma oxidation using a mixture of O2 and N2O to improve the performance of polycrystalline Si thin film transistors. In conventional high-temperature N2O annealing, nitrogen can be supplied to the Si/SiO2 interface because a NO molecule can diffuse through the oxide. However, it was found that nitrogen cannot be supplied to the Si/SiO2 interface by plasma oxidation as the N2O molecule is broken in the plasma and because a dense Si-N bond is formed at the SiO2 surface, preventing further diffusion of nitrogen into the oxide. Nitrogen was added to the Si/SiO2 interface by the plasma oxidation of mixtures of O2/N2O gas, leading to an enhancement of the field effect mobility of polycrystalline Si TFTs due to the reduction in the number of trap densities at the interface and at the Si grain boundaries due to nitrogen passivation.