Amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) with a coplanar structure were fabricated to investigate the feasibility of their potential application in large size organic light emitting diodes (OLEDs). Drain currents, used as functions of the gate voltages for the TFTs, showed the output currents had slight differences in the saturation region, just as the output currents of the etch stopper TFTs did. The maximum difference in the threshold voltages of the In-Ga-Zn-O (a-IGZO) TFTs was as small as approximately 0.57 V. After the application of a positive bias voltage stress for 50,000 s, the values of the threshold voltage of the coplanar structure TFTs were only slightly shifted, by 0.18 V, indicative of their stability. The coplanar structure TFTs were embedded in OLEDs and exhibited a maximum luminance as large as 500 nits, and their color gamut satisfied 99 % of the digital cinema initiatives, confirming their suitability for large size and high resolution OLEDs. Further, the image density of large-size OLEDs embedded with the coplanar structure TFTs was significantly enhanced compared with OLEDs embedded with conventional TFTs.

As the demand for p-type semiconductors increases, much effort is being put into developing new p-type materials. This demand has led to the development of novel new p-type semiconductors that go beyond existing p-type semiconductors. Copper iodide (CuI) has recently received much attention due to its wide band gap, excellent optical and electrical properties, and low temperature synthesis. However, there are limits to its use as a semiconductor material for thin film transistor devices due to the uncontrolled generation of copper vacancies and excessive hole doping. In this work, p-type CuI semiconductors were fabricated using the chemical vapor deposition (CVD) process for thin-film transistor (TFT) applications. The vacuum process has advantages over conventional solution processes, including conformal coating, large area uniformity, easy thickness control and so on. CuI thin films were fabricated at various deposition temperatures from 150 to 250 °C The surface roughness root mean square (RMS) value, which is related to carrier transport, decreases with increasing deposition temperature. Hall effect measurements showed that all fabricated CuI films had p-type behavior and that the Hall mobility decreased with increasing deposition temperature. The CuI TFTs showed no clear on/off because of the high concentration of carriers. By adopting a Zn capping layer, carrier concentrations decreased, leading to clear on and off behavior. Finally, stability tests of the PBS and NBS showed a threshold voltage shift within ±1 V.

휘어지며 투명한 전자기기의 개발을 위해서 최근 유기반도체, 탄소기반 나노소재, 금속산화물 반도체등의 다양한 신소재 반도체 개발에 대한 연구가 관심을 받으며 지속적으로 발전하고 있다. 그러나, 이러한 신소재 반도체 기술의 꾸준하고 지속적인 발전에도 불구하고 트랜지스터를 구성하는 주요 소재중 하나인 유전체에 대한 연구는 반도체의 개발속도에 크게 미치지 못하여, 기계적인 휘어짐의 특성을 갖추고, 높은 캐패시턴스와 좋은 누전전류 특성을 갖는 새로운 유전체 개발에 대한 요구가 지속적으로 커지고 있다. 이에 본 연구는 저전압에서 구동 가능한 박막트랜지스터를 위한 유기-무기 하이브리드소재 박막을 개발하며 이를 저전압 구동이 가능한 유기박막트랜지스터에 적용하였다. 상대적으로 높은 유전상수를 갖는 염화하프늄 (HfO2)과 소수성기를 갖고 있으며 금속산화물과 공유결합이 가능한 실란산 기반의 유기물 (octadecyltrimethoxysilane)을 혼합한 전구체 용액을 합성하며 상대적으로 낮은 온도에서 열처리를 통해 얻을 수 있었다. 제조된 하이브리드 게이트 유전체 박막은 우수한 절연 및 유전체 특성과 함께 소수성 표면 특성을 가질 수 있었고 펜타센 유기박막트랜지스터로 응용하여 저전압에서 구동이 되며 우수한 트랜지스터 성능을 갖는 소자를 개발하였다.

Oxide semiconductor, represented by a-IGZO, has been commercialized in the market as active layer of TFTs of display backplanes due to its various advantages over a-Si. a-IGZO can be deposited at room temperature by RF magnetron sputtering process; however, additional thermal annealing above 300oC is required to obtain good semiconducting properties and stability. These temperature are too high for common flexible substrates like PET, PEN, and PI. In this work, effects of microwave annealing time on IGZO thin film and associated thin-film transistors are demonstrated. As the microwave annealing time increases, the electrical properties of a-IGZO TFT improve to a degree similar to that during thermal annealing. Optimal microwave annealed IGZO TFT exhibits mobility, SS, Vth, and VH of 6.45 cm2/Vs, 0.17 V/dec, 1.53 V, and 0.47 V, respectively. PBS and NBS stability tests confirm that microwave annealing can effectively improve the interface between the dielectric and the active layer.

Amorphous In-Ga-Zn-O (a-IGZO) thin film transistors, because of their relatively low mobility, have limits in attempts to fulfill high-end specifications for display backplanes. In-Zn-O (IZO) is a promising semiconductor material for high mobility device applications with excellent transparency to visible light region and low temperature process capability. In this paper, the effects of working pressure on the physical and electrical properties of IZO films and thin film transistors are investigated. The working pressure is modulated from 2 mTorr to 5 mTorr, whereas the other process conditions are fixed. As the working pressure increases, the extracted optical band gap of IZO films gradually decreases. Absorption coefficient spectra indicate that subgap states increase at high working pressure. Furthermore, IZO film fabricated at low working pressure shows smoother surface morphology. As a result, IZO thin film transistors with optimum conditions exhibit excellent switching characteristics with high mobility (≥ 30cm2/Vs) and large on/off ratio.

We examined the characteristics of indium tin zinc oxide (ITZO) thin film transistors (TFTs) on polyimide (PI) substrates for next-generation flexible display application. In this study, the ITZO TFT was fabricated and analyzed with a SiOx/ SiNx gate insulator deposited using plasma enhanced chemical vapor deposition (PECVD) below 350℃. X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS) results revealed that the oxygen vacancies and impurities such as H, OH and H2O increased at ITZO/gate insulator interface. Our study suggests that the hydrogen related impurities existing in the PI and gate insulator were diffused into the channel during the fabrication process. We demonstrate that these impurities and oxygen vacancies in the ITZO channel/gate insulator may cause degradation of the electrical characteristics and bias stability. Therefore, in order to realize high performance oxide TFTs for flexible displays, it is necessary to develop a buffer layer (e.g., Al2O3) that can sufficiently prevent the diffusion of impurities into the channel.

The properties of zinc oxynitride semiconductors and their associated thin film transistors are studied. Reactively sputtered zinc oxynitride films exhibit n-type conduction, and nitrogen-rich compositions result in relatively high electron mobility. Nitrogen vacancies are anticipated to act as shallow electron donors, as their calculated formation energy is lowest among the possible types of point defects. The carrier density can be reduced by substituting zinc with metals such as gallium or aluminum, which form stronger bonds with nitrogen than zinc does. The electrical properties of gallium-doped zinc oxynitride thin films and their respective devices demonstrate the carrier suppression effect accordingly.

Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide whichcan enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was thenprepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a NiCl2 environment. Afterremoving surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemicalvapor deposition at 200oC. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing(RTA) process at 730oC for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as thecrystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer wasepitaxially crystallized with the help of NiSi2 precipitates that originated from the poly-Si seed layer. The crystallinity of theSERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process.The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to 1×1018cm−3. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by theSERTA process were 85cm2/V·s and 1.23V/decade at Vds=−3V, respectively. The off current was little increased underreverse bias from 1.0×10−11 A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakagecurrent can be fabricated with more precise experiments.

We analysed interfacial traps in organic thin-film transistors (TFTs) in which pentacene and 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-pentacene) organic semiconductors were deposited by means of vacuum-thermal evaporation and drop-coating methods, respectively. The thermally-deposited pentacene film consists of dentritic grains with the average grain size of around 1 ?m, while plate-like crystals over a few hundred microns are observed in the solution-processed TIPS-pentacene film. From the transfer characteristics of both TFTs, lower subthreshold slope of 1.02 V/decade was obtained in the TIPS-pentacene TFT, compared to that (2.63 V/decade) of the pentacene transistor. The interfacial trap density values calculated from the subthreshold slope are about 3.4×1012/cm2 and 9.4×1012/cm2 for the TIPS-pentacene and pentacene TFTs, respectively. Herein, lower subthreshold slope and less interfacial traps in TIPS-pentacene TFTs are attributed to less domain boundaries in the solution-processed TIPS-pentacene film.

유기 박막 트랜지스터 (organic thin-film transistors; OTFTs)는 유기 반도체 그리고 디스플레이와 같은 분야에 그들의 잠재적인 응용 가능성 때문에 많은 주목을 받고 있다. 하지만 급격한 산화 혹은 낮은 전기 이동도와 같은 단점으로 인하여 n-형 물질은 p-형 물질에 비해서 상대적으로 많은 연구가 진행되지 못한 실정이다. 따라서 본 논문에서는 n-형 반도체 물질인 [6,6]-phenyl-C61-butyricacidmethylester (PCBM)과 Poly(4-vinylphenol) (PVP)을 유기 절연막으로 이용하여 o-dichlorobenzene, toluene and chloroform과 같은 다양한 유기 용매를 사용한 플라스틱 기판에 유기트랜지스터를 제작하였고 유기 용매가 ODCB 경우 전계 효과 이동도는 약 0.034 cm2/Vs 그리고 점멸비(on/off ratio)는 ~1.3×105 으로 향상 되었다. 다양한 유기 용매의 휘발성에 따라서 PCBM TFT의 전기적 특성에 미치는 영향을 규명하였다.

We studied the influence of different types of metal electrodes on the performance of solution-processed zinc tin oxide (ZTO) thin-film transistors. The ZTO thin-film was obtained by spin-coating the sol-gel solution made from zinc acetate and tin acetate dissolved in 2-methoxyethanol. Various metals, Al, Au, Ag and Cu, were used to make contacts with the solution-deposited ZTO layers by selective deposition through a metal shadow mask. Contact resistance between the metal electrode and the semiconductor was obtained by a transmission line method (TLM). The device based on an Al electrode exhibited superior performance as compared to those based on other metals. Kelvin probe force microscopy (KPFM) allowed us to measure the work function of the oxide semiconductor to understand the variation of the device performance as a function of the types metal electrode. The solution-processed ZTO contained nanopores that resulted from the burnout of the organic species during the annealing. This different surface structure associated with the solution-processed ZTO gave a rise to a different work function value as compared to the vacuum-deposited counterpart. More oxygen could be adsorbed on the nanoporous solution-processed ZTO with large accessible surface areas, which increased its work function. This observation explained why the solution-processed ZTO makes an ohmic contact with the Al electrode.

Oxide semiconductors Thin-film transistors are an exemplified one owing to its excellent ambient stability and optical transparency. In particular zinc oxide (ZnO) has been reported because It has stability in air, a high electron mobility, transparency and low light sensitivity, compared to any other materials. For this reasons, ZnO TFTs have been studied actively. Furthermore, we expected that would be satisfy the demands of flexible display in new generation. In order to do that, ZnO TFTs must be fabricated that flexible substrate can sustain operating temperature. So, In this paper we have studied low-temperature process of zinc oxide(ZnO) thin-film transistors (TFTs) based on silicon nitride (SiNx)/cross-linked poly-vinylphenol (C-PVP) as gate dielectric. TFTs based on oxide fabricated by Low-temperature process were similar to electrical characteristics in comparison to conventional TFTs. These results were in comparison to device with SiNx/low-temperature C-PVP or SiNx/conventional C-PVP. The ZnO TFTs fabricated by low-temperature process exhibited a field-effect mobility of 0.205 cm2/Vs, a thresholdvoltage of 13.56 V and an on/off ratio of 5.73×106. As a result, We applied experimental for flexible PET substrate and showed that can be used to ZnO TFTs for flexible application.

본 논문은 메탈 이중층 전극을 이용한 유기 박막 트랜지스터를 제작하여 Au나 Ag 금속만으로 제작한 일반적인 유기 박막 트랜지스터와의 전기적 특성을 비교하였다. 전기적 특성에서 게이트 절연층은 높은 K 값을 갖는 Al2O3를 사용하였고, 유기 반도체층은 펜타센을 사용하였다. 본 실험에서 제작한 유기 박막 트랜지스터는 1.6 × 10-1 cm2의 포화영역 이동도를 얻을 수 있었으며, 또한 드레인 전압을 -5V로 하고, 게이트 전압을 3 V에서 -10 V 까지 인가하였을 때 3×105의 전멸 비를 얻을 수 있었다.

Silicon dioxide as gate dielectrics was grown at 400˚C on a polycrystalline Si substrate by inductively coupled plasma oxidation using a mixture of O2 and N2O to improve the performance of polycrystalline Si thin film transistors. In conventional high-temperature N2O annealing, nitrogen can be supplied to the Si/SiO2 interface because a NO molecule can diffuse through the oxide. However, it was found that nitrogen cannot be supplied to the Si/SiO2 interface by plasma oxidation as the N2O molecule is broken in the plasma and because a dense Si-N bond is formed at the SiO2 surface, preventing further diffusion of nitrogen into the oxide. Nitrogen was added to the Si/SiO2 interface by the plasma oxidation of mixtures of O2/N2O gas, leading to an enhancement of the field effect mobility of polycrystalline Si TFTs due to the reduction in the number of trap densities at the interface and at the Si grain boundaries due to nitrogen passivation.